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benefits improved gate, avalanche and dynamic dv/dt ruggedness fully characterized capacitance and avalanche soa enhanced body diode dv/dt and di/dt capability IRFB4110PBF hexfet power mosfet applications high efficiency synchronous rectification in smps uninterruptible power supply high speed power switching hard switched and high frequency circuits s d g to-220ab d gds gate drain source s d g v dss 100v r ds(on) typ. 3.7m max. 4.5m i d (silicon limited) 180a i d (package limited) 120a absolute maximum ratings symbol parameter units i d @ t c = 25c continuous drain current, vgs @ 10v (silicon limited) a i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 25c continuous drain current, v gs @ 10v (wire bond limited) i dm pulsed drain current p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v dv/dt peak diode recovery v/ns t j operating junction and c t stg storage temperature range soldering temperature, for 10 seconds (1.6mm from case) mounting torque, 6-32 or m3 screw avalanche characteristics e as (thermally limited) single pulse avalanche energy mj i ar avalanche current a e ar repetitive avalanche energy mj thermal resistance symbol parameter typ. max. units r jc junction-to-case ??? 0.402 r cs case-to-sink, flat greased surface 0.50 ??? c/w r ja junction-to-ambient ??? 62 300 max. 180 130 670 120 190 see fig. 14, 15, 22a, 22b 370 5.3 -55 to + 175 20 2.5 10lb in (1.1n m) www.freescale.net.cn 1 / 8
calculated continuous current based on maximum allowable junction temperature. bond wire current limit is 120a. note that current limitations arising from heating of the device leads may occur with some lead mounting arrangements. repetitive rating; pulse width limited by max. junction temperature. limited by t jmax , starting t j = 25c, l = 0.033mh r g = 25 , i as = 108a, v gs =10v. part not recommended for use above this value. s d g i sd 75a, di/dt 630a/ s, v dd v (br)dss , t j 175c. pulse width 400 s; duty cycle 2%. c oss eff. (tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . c oss eff. (er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 to 80% v dss . when mounted on 1" square pcb (fr-4 or g-10 material). for recom mended footprint and soldering techniques refer to application note #an-994.
r is measured at t j approximately 90c. static @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 100 ??? ??? v v (br)dss / t j breakdown voltage temp. coefficient ??? 0.108 ??? v/c r ds(on) static drain-to-source on-resistance ??? 3.7 4.5 m v gs(th) gate threshold voltage 2.0 ??? 4.0 v i dss drain-to-source leakage current ??? ??? 20 a ??? ??? 250 i gss gate-to-source forward leakage ??? ??? 100 na gate-to-source reverse leakage ??? ??? -100 dynamic @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units gfs forward transconductance 160 ??? ??? s q g total gate charge ??? 150 210 nc q gs gate-to-source charge ??? 35 ??? q gd gate-to-drain ("miller") charge ??? 43 ??? r g gate resistance ??? 1.3 ??? t d(on) turn-on delay time ??? 25 ??? ns t r rise time ??? 67 ??? t d(off) turn-off delay time ??? 78 ??? t f fall time ??? 88 ??? c iss input capacitance ??? 9620 ??? pf c oss output capacitance ??? 670 ??? c rss reverse transfer capacitance ??? 250 ??? c oss eff. (er) effective output capacitance (energy related) ??? 820 ??? c oss eff. (tr) effective output capacitance (time related) ??? 950 ??? diode characteristics symbol parameter min. typ. max. units i s continuous source current ??? ??? 170 a (body diode) i sm pulsed source current ??? ??? 670 (body diode) v sd diode forward voltage ??? ??? 1.3 v t rr reverse recovery time ??? 50 75 ns t j = 25c v r = 85v, ??? 60 90 t j = 125c i f = 75a q rr reverse recovery charge ??? 94 140 nc t j = 25c di/dt = 100a/ s ??? 140 210 t j = 125c i rrm reverse recovery current ??? 3.5 ??? a t j = 25c t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) i d = 75a r g = 2.6 v gs = 10v v dd = 65v t j = 25c, i s = 75a, v gs = 0v integral reverse p-n junction diode. conditions v gs = 0v, i d = 250 a reference to 25c, i d = 5ma v gs = 10v, i d = 75a v ds = v gs , i d = 250 a v ds = 100v, v gs = 0v v ds = 100v, v gs = 0v, t j = 125c mosfet symbol showing the v ds = 50v conditions v gs = 10v v gs = 0v v ds = 50v ? = 1.0mhz v gs = 0v, v ds = 0v to 80v v gs = 0v, v ds = 0v to 80v conditions v ds = 50v, i d = 75a i d = 75a v gs = 20v v gs = -20v IRFB4110PBF www.freescale.net.cn 2 / 8
fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 8.0v 6.0v 5.5v 5.0v 4.8v bottom 4.5v 60 z s pulse width tj = 25c 4.5v 0.1 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 60 z s pulse width tj = 175c vgs top 15v 10v 8.0v 6.0v 5.5v 5.0v 4.8v bottom 4.5v 1 2 3 4 5 6 7 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 175c v ds = 25v 60 z s pulse width 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 3.0 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 75a v gs = 10v 0 50 100 150 200 q g , total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 80v v ds = 50v i d = 75a IRFB4110PBF www.freescale.net.cn 3 / 8
fig 8. maximum safe operating area fig 10. drain-to-source breakdown voltage fig 7. typical source-drain diode forward voltage fig 11. typical c oss stored energy fig 9. maximum drain current vs. case temperature fig 12. maximum avalanche energy vs. draincurrent 0.0 0.5 1.0 1.5 2.0 v sd , source-to-drain voltage (v) 0.1 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , temperature ( c ) 90 95 100 105 110 115 120 125 v ( b r ) d s s , d r a i n - t o - s o u r c e b r e a k d o w n v o l t a g e ( v ) id = 5ma 0 20 40 60 80 100 120 v ds, drain-to-source voltage (v) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 e n e r g y ( z j ) 25 50 75 100 125 150 175 t c , case temperature (c) 0 20 40 60 80 100 120 140 160 180 i d , d r a i n c u r r e n t ( a ) limited by package 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 100 200 300 400 500 600 700 800 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 17a 27a bottom 108a 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100 z sec dc IRFB4110PBF www.freescale.net.cn 4 / 8
fig 13. maximum effective transient thermal impedance, junction-to-case fig 14. typical avalanche current vs.pulsewidth fig 15. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 14, 15: (for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 16a, 16b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 14, 15). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 13) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.0001 0.001 0.01 0.1 1 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) i (sec) 0.09876251 0.000111 0.2066697 0.001743 0.09510464 0.012269 j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 c c ci= i / ri ci= i / ri 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1.0% duty cycle i d = 108a 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. 0.01 allowed avalanche current vs avalanche pulsewidth, tav, assuming tj = 150c and tstart =25c (single pulse) IRFB4110PBF www.freescale.net.cn 5 / 8
fig 16. threshold voltage vs. temperature !
! -75 -50 -25 0 25 50 75 100 125 150 175 200 t j , temperature ( c ) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v g s ( t h ) , g a t e t h r e s h o l d v o l t a g e ( v ) i d = 250 a i d = 1.0ma i d = 1.0a 0 200 400 600 800 1000 di f /dt (a/ s) 0 5 10 15 20 25 i r r ( a ) i f = 30a v r = 85v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 0 5 10 15 20 25 i r r ( a ) i f = 45a v r = 85v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 80 160 240 320 400 480 560 q r r ( a ) i f = 30a v r = 85v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/ s) 80 160 240 320 400 480 560 q r r ( a ) i f = 45a v r = 85v t j = 25c t j = 125c IRFB4110PBF www.freescale.net.cn 6 / 8
fig 22a. switching time test circuit fig 22b. switching time waveforms v gs v ds 90% 10% t d(on) t d(off) t r t f v gs pulse width < 1 s duty factor < 0.1% v dd v ds l d d.u.t + - fig 21b. unclamped inductive waveforms fig 21a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 23a. gate charge test circuit fig 23b. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 20. " for n-channel hexfet power mosfets 1k vcc dut 0 l

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p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period #
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IRFB4110PBF www.freescale.net.cn 7 / 8
to-220ab packages are not recommended for surface mount application.

note: "p" in assembly line position indicates "lead-free" IRFB4110PBF www.freescale.net.cn 8 / 8

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